#include	<stdio.h>
#include	<stdlib.h>
#include    <iostream>
#include	<string.h> /*  for length function. */

using namespace std;
 /* Algorithm: Each node is represented by a boolean equation in terms of variables in previous level.
 So we need first to define input array. Each logic gate would form a struct.*/

 //We first try to get a good hold on reading Tree-structured combinational logic.
 
struct gate{
       // vector<wire> A; // we dont know the number inputs to this gate. We might require struc like case for inputs and nodes
       // wire o;// the only thing we know is that the output is some boolean function of all the input
       char f;// OR=o, AND=a, NOR=r, NAND=d, XOR=x, NOT=t
       // o=f(A);   // each gate is representated by a function.
       int no_input;
       int frontier;
       int orphan;
      // int index_input[no_input];
      // wire* input[no_input];
                 };


struct wire{
          int fault;//0 if absent
              //1 if stuck-at-0 fault present.
              //2 if stuck-at-1 fault present.
          gate * input_gate;// input of wire is output of this gate
          gate * output_gate;// the output of this wire goes to this gate
          int value;// can be either 1 or zero. default 2 implies that no value has been assigned.
          };
 
gate readgate(){
      gate temp;
      
      cout<<"Enter number of inputs for this gate - "<<endl;
      cin>>temp.no_input;
      cout<<"Enter the type of logical function gate is going to perform -"<<endl;
      cout<<"(OR=o, AND=a, NOR=r, NAND=d, XOR=x, NOT=t)"<<endl;
      cin>>temp.f;
      return temp;
      }
      
wire readwire(gate *logic1){
      wire temp;
      int n=-1;
      int m=-1;
      cout<<"Enter index of input gate (-1 if primary input) :"<<endl;
      cin>>n;//assuming that the gate numbering starts from 1
      if (n==-1)
      {temp.input_gate= NULL;// implies that this is primary input to the circuit
       cout<<"NULL identified while assigning input gate"<<endl;}
      else
      {temp.input_gate= &logic1[n];
      cout<<"index of input gate = "<< n<<endl;} 
      cout<<"Enter index of output gate(-1 if final output) :"<<endl;
      //cout<<"enter the gate of which this wire is input, '-1' if there is no such gate"<<endl;;
      cin>>m;
      if (m==-1)
      {temp.output_gate= NULL;
      cout<<" NULL identified while assigning output gate"<<endl;}
      else
      {temp.output_gate= &logic1[m];// Logic array of gates is not identified in this function. Might require global defination.
      cout<<"index of output gate = "<< m<<endl;}
      int fault_temp=0;
      cout<<"Enter fault condition. 0 for stuck-at-0, 1 for stuck-at-1, 2 for no fault"<<endl;
      cin>> fault_temp;
      temp.fault=fault_temp;
      temp.value=2;
      return temp;
      }
      
int complete_frontier(int no_wire, int no_gate, wire * node, gate * logic){
    cout<<"inside the complete_frontier loop  "<<endl;
     //check which is frontier
     //right now scan option. It can be replaced by BDD later.
    // cout<<"check the frontier value of the gate "<< logic[0].frontier<<endl;
     
     int value_excitaion=2;
     int next_frontier;
     int index_newassignment;
     int condition=0;
     int i=0;
     int j=0;
     int i_1;
     for (i_1=0; i_1<no_gate; i_1++){
         i=i_1;
         if (logic[i_1].frontier == 1)
         {cout<<"frontier value "<<logic[i_1].frontier<<endl;
         break;}
         }
         cout<<"frontier found at gate no "<<i<<endl;
         
         if(i_1==no_gate)//I dont think this condition will ever take place. It is kind of redundant since we are always checking for frontier reaching output.
         condition=1;
//logic[i[ is the frontier! .  Task to complete
// we neeed to get the  excitaion input to output. Obviously this is going to be gate specfic. Therefore we make case statement here.
//for now we just assume two inputs to a gate.
         else{
         switch(logic[i].f){
                   case 'a': //and gate
                   cout<<"Intial frontier AND gate"<<endl;
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(j=0;j<no_wire;j++){cout<<"checking node values "<<j<<node[j].value<<endl;
                    cout<<"value at node 2 1 "<<node[2].value<<endl;
                                      if((node[j].output_gate == &logic[i]) & (node[j].value==2))
                                           //checks that it is input to frontier gate and has value unassigned
                                           //remove the frontier tag from this gate.
                                          {cout<<"value of index of the unassigned input of the frontier "<<j<<endl;
                                          //logic[i].frontier=0;
                                          node[j].value=1;
                                          index_newassignment=j;
                                           }// Assigns value to this input=1;}
                                        else  if((node[j].output_gate == &logic[i]) & (node[j].value!=2))//checks for excitaion value
                                          { value_excitaion = node[j].value;//saves present value of excitaion.
                                           cout <<"value of j "<<j<<"  value of node at this index === "<<node[j].value<<endl;
                                           cout<<"value_excitaion from present excitaion"<<value_excitaion<<endl;
                                           }
                                          }
                                          cout<<"value at node 2 2 "<<node[2].value<<endl;
                                      for(j=0;j<no_wire;j++)
                                      {
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {node[j].value=value_excitaion;
                                       next_frontier=j;
                                       break;
                                       }    
                                       cout<<"checking node values after for loop "<<j<<node[j].value<<endl;
                                       }
                                       cout<<"value at node 2 3 "<<node[2].value<<endl;
                                           cout<<"end of case NAND"<<endl;
                                       break;
                  case 'o':
                       cout<<"Intial frontier OR gate"<<endl;
                   for(j=0;j<no_wire;j++){
                                      if((node[j].output_gate == &logic[i]) & (node[j].value==2))
                                           //checks that it is input to frontier gate and has value unassigned
                                           //remove the frontier tag from this gate.
                                          {cout<<"value of index of the unassigned input of the frontier "<<j<<endl;
                                          logic[i].frontier=0;
                                          node[j].value=0;
                                          index_newassignment=j;
                                          }// Assigns value to this input=1;}
                                        else  if((node[j].output_gate == &logic[i]) & (node[j].value!=2))//checks for excitaion value
                                         { value_excitaion = node[j].value;//saves present value of excitaion.
                                           cout <<"value of j "<<j<<"  value of node at this index === "<<node[j].value<<endl;
                                           cout<<"value_excitaion from present excitaion"<<value_excitaion<<endl;
                                          }
                                          }
                                      for(j=0;j<no_wire;j++)
                                      {
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {node[j].value=value_excitaion;
                                       next_frontier=j;
                                       break;
                                       }
                                       }
                                       break;
                    case 'd'://NAND
                     cout<<"Intial frontier nAND gate"<<endl;
                   for(j=0;j<no_wire;j++){
                                      if((node[j].output_gate == &logic[i]) & (node[j].value==2))
                                           //checks that it is input to frontier gate and has value unassigned
                                           //remove the frontier tag from this gate.
                                          {cout<<"value of index of the unassigned input of the frontier "<<j<<endl;
                                          logic[i].frontier=0;
                                          node[j].value=1;
                                          index_newassignment=j;
                                          }// Assigns value to this input=1;}
                                        else  if((node[j].output_gate == &logic[i]) & (node[j].value!=2))//checks for excitaion value
                                         { value_excitaion = node[j].value;//saves present value of excitaion.
                                           cout <<"value of j "<<j<<"  value of node at this index === "<<node[j].value<<endl;
                                           cout<<"value_excitaion from present excitaion"<<value_excitaion<<endl;
                                          }
                                          }
                                    for(j=0;j<no_wire;j++)
                                    {
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {next_frontier=j;
                                       if (value_excitaion ==1)
                                       node[j].value=0;
                                       else
                                       node[j].value=1;
                                       break;
                                       }
                                       }  
                                       cout<<"end of case NAND"<<endl;
                                       break;    
                    case 'r'://NOT
                     cout<<"Intial frontier NOR gate"<<endl;
                   for(j=0;j<no_wire;j++){
                                      if((node[j].output_gate == &logic[i]) & (node[j].value==2))
                                           //checks that it is input to frontier gate and has value unassigned
                                           //remove the frontier tag from this gate.
                                          {cout<<"value of index of the unassigned input of the frontier "<<j<<endl;
                                          logic[i].frontier=0;
                                          node[j].value=0;
                                          index_newassignment=j;
                                          }// Assigns value to this input=1;}
                                        else  if((node[j].output_gate == &logic[i]) & (node[j].value!=2))//checks for excitaion value
                                         { value_excitaion = node[j].value;//saves present value of excitaion.
                                           cout <<"value of j "<<j<<"  value of node at this index === "<<node[j].value<<endl;
                                           cout<<"value_excitaion from present excitaion"<<value_excitaion<<endl;
                                          }
                                          }
                                   for(j=0;j<no_wire;j++)
                                   {
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {next_frontier=j;
                                       if (value_excitaion ==1)
                                       node[j].value=0;
                                       else
                                       node[j].value=1;
                                       break;
                                       }
                                       }
                                       break;
                   case 't'://NOT
                    cout<<"Intial frontiee NOT gate"<<endl;
                   for(j=0;j<no_wire;j++){//No other assignemnt to be made
                                  /*    if((node[j].output_gate == &logic[i]) & (node[j].value==2))
                                           //checks that it is input to frontier gate and has value unassigned
                                           //remove the frontier tag from this gate.
                                          {cout<<"value of index of the unassigned input of the frontier "<<j<<endl;
                                          logic[i].frontier=0;
                                          node[j].value=0;
                                          index_newassignment=j;
                                          }// Assigns value to this input=1;}*/
                                        if((node[j].output_gate == &logic[i]) & (node[j].value!=2))//checks for excitaion value
                                         { value_excitaion = node[j].value;//saves present value of excitaion.
                                           cout <<"value of j "<<j<<"  value of node at this index === "<<node[j].value<<endl;
                                           cout<<"value_excitaion from present excitaion"<<value_excitaion<<endl;
                                          }
                                          }
                                           for(j=0;j<no_wire;j++){
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {next_frontier=j;
                                       if (value_excitaion ==1)
                                       node[j].value=0;
                                       else
                                       node[j].value=1;
                                       break;
                                       }
                                       }
                                       break;
                   case 'x'://XOR
                    cout<<"Intial frontier XOR gate"<<endl;
                    
                    for(j=0;j<no_wire;j++){
                                      if((node[j].output_gate == &logic[i]) & (node[j].value==2))
                                           //checks that it is input to frontier gate and has value unassigned
                                           //remove the frontier tag from this gate.
                                          {cout<<"value of index of the unassigned input of the frontier "<<j<<endl;
                                          logic[i].frontier=0;
                                          node[j].value=0;
                                          index_newassignment=j;
                                          }// Assigns value to this input=1;}
                                        else  if((node[j].output_gate == &logic[i]) & (node[j].value!=2))//checks for excitaion value
                                         { value_excitaion = node[j].value;//saves present value of excitaion.
                                           cout <<"value of j "<<j<<"  value of node at this index === "<<node[j].value<<endl;
                                           cout<<"value_excitaion from present excitaion"<<value_excitaion<<endl;
                                          }
                                          }
                                   for(j=0;j<no_wire;j++)
                                      {
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {node[j].value=value_excitaion;
                                       next_frontier=j;
                                       break;
                                       }
                                       }
                                       break;
                   }
                   cout<<"outside complete case switch statement "<<endl;
                 //  cout<<"value of excitation "<<value_excitaion<<endl;
//carry on the frontier
//find output wire of present gate and assign some value to it.

//cout<<" i value under consideration "<<i<<endl;
      /*           for(j=0;j<no_wire;j++){cout<<"j value "<<j<<endl;
                 cout<<node[2].input_gate->frontier<<node[j].value<<endl;
                                       if((node[j].input_gate == &logic[i]) & (node[j].value==2))   
                                       {node[j].value=value_excitaion;
                                       cout<<"Enter in the if loop "<<endl;
                                       break;
                                       }
                                       }
                                       cout<<"break!! "<<j<<endl;*/
                                       //We asssume fue that we will get atleast one value of j from this loop ...
                                       //...if we happen to call this funtion
                  if(node[next_frontier].output_gate == NULL)
                                       {condition=1;
                                       cout<<"frontier reached output"<<endl;
                                       }//implies frontier has reached output. Work done.}
                  else
                                       {node[next_frontier].output_gate->frontier=1;
                                       cout<<"frontier didnt reach output"<<endl;
                                       }//assign new frontier.
                                       cout<<"ending the frontier completion"<<endl;
                  //The new assigment for the input will also create an orphan
                  
                  if (node[index_newassignment].input_gate != NULL)
                  node[index_newassignment].input_gate -> orphan=1;
                  //new orphan
                                       }//ending bracket for else 
                                       
                                       return condition;
}

          
int complete_orphan(int no_wire, int no_gate, wire * node, gate * logic){
int a=0;
int array_input[10];  //AT max we will be having 10 inputs.
int condition=0;
int value_backtracked=0;
int i_1;
int i=0;
cout<<"no of gate "<<no_gate<<endl;
for (i_1=0; i_1<no_gate; i_1++){
         i=i_1;
         if (logic[i_1].orphan == 1)
        { cout<<"orphan value "<<logic[i_1].orphan<<endl;
        cout<<"At index "<<i_1<<endl;
         break;
         }
                                  }                         
         //cout<<"orphan found at gate no "<<i;
         
         if(i_1==no_gate){
         condition=1;
         cout<<"No orphan found "<<endl;}
         
         else{
         switch(logic[i].f){
                   case 'a': //and gate
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(int j=0;j<no_wire;j++){//Either one of the following or none wil happen at each 'j'
                                      if((node[j].input_gate == &logic[i]) & (node[j].value!=2))
                                           //check for value in the output.
                                           //remove the frontier tag from this gate.
                                          { cout<<"index of the output of the orphan gate  "<<j<<endl; 
                                           value_backtracked=node[j].value;//saves the value of backtracked value
                                           }}
                   for(int j=0;j<no_wire;j++){
                                        if((node[j].output_gate == &logic[i]) & (node[j].value==2))//checks for the unassgned inputs
                                          {node[j].value=value_backtracked;//Assgn the value.
                                           cout<<" the index of the wire which is input to orphan gate "<<j<<endl;
                                           cout<<" value assgined to this wire is "<<node[j].value <<endl;
                                           array_input[a]=j;
                                           cout<<"array of inputs new addition "<< array_input[a]<<" at index   "<<a<<endl;
                                           a++;
                                          } // Else if will be entered twice so 'a' will at max become 1!!!
                  
                  }
                  break;
                   case 'o': //OR gate
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(int j=0;j<no_wire;j++){//Either one of the following or none wil happen at each 'j'
                                      if((node[j].input_gate == &logic[i]) & (node[j].value!=2))
                                           //check for value in the output.
                                           //remove the frontier tag from this gate.
                                          {cout<<"index of the output of the orphan gate  "<<j<<endl; 
                                           value_backtracked=node[j].value;//saves the value of backtracked value
                                           }}
                   for(int j=0;j<no_wire;j++){
                                        if((node[j].output_gate == &logic[i]) & (node[j].value==2))//checks for the unassgned inputs
                                          {node[j].value=value_backtracked;//Assgn the value.
                                           cout<<" the index of the wire which is input to orphan gate "<<j<<endl;
                                           cout<<" value assgined to this wire is "<<node[j].value <<endl;
                                           array_input[a]=j;
                                           cout<<"array of inputs new addition "<< array_input[a]<<" at index   "<<a<<endl;
                                           a++;
                                          } // Else if will be entered twice so 'a' will at max become 1!!!
                  
                                                }
                                                break;
                  case 'd': //NAND gate
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(int j=0;j<no_wire;j++){//Either one of the following or none wil happen at each 'j'
                                      if((node[j].input_gate == &logic[i]) & (node[j].value!=2))
                                           //check for value in the output.
                                           //remove the frontier tag from this gate.
                                          {cout<<"index of the output of the orphan gate  "<<j<<endl; 
                                           value_backtracked=node[j].value;//saves the value of backtracked value
                                           }}
                   for(int j=0;j<no_wire;j++){
                                        if((node[j].output_gate == &logic[i]) & (node[j].value==2))//checks for the unassgned inputs
                                          {if (value_backtracked ==1)
                                              node[j].value= 0;//Assgn the value.
                                              else
                                              node[j].value= 1;
                                           cout<<" the index of the wire which is input to orphan gate "<<j<<endl;
                                           cout<<" value assgined to this wire is "<<node[j].value <<endl;
                                           array_input[a]=j;
                                           cout<<"array of inputs new addition "<< array_input[a]<<" at index   "<<a<<endl;
                                           a++;
                                          } // Else if will be entered twice so 'a' will at max become 1!!!
                  
                                                  }
                                                  break;
                  case 'r': //NOR gate
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(int j=0;j<no_wire;j++){//Either one of the following or none wil happen at each 'j'
                                      if((node[j].input_gate == &logic[i]) & (node[j].value!=2))
                                           //check for value in the output.
                                           //remove the frontier tag from this gate.
                                          {cout<<"index of the output of the orphan gate  "<<j<<endl; 
                                           value_backtracked=node[j].value;//saves the value of backtracked value
                                           }}
                   for(int j=0;j<no_wire;j++){
                                        if((node[j].output_gate == &logic[i]) & (node[j].value==2))//checks for the unassgned inputs
                                          {if (value_backtracked ==1)
                                              node[j].value= 0;//Assgn the value.
                                              else
                                              node[j].value= 1;
                                           cout<<" the index of the wire which is input to orphan gate "<<j<<endl;
                                           cout<<" value assgined to this wire is "<<node[j].value <<endl;
                                           array_input[a]=j;
                                           cout<<"array of inputs new addition "<< array_input[a]<<" at index   "<<a<<endl;
                                           a++;
                                          } // Else if will be entered twice so 'a' will at max become 1!!!
                  
                                           }
                                           break;
                  case 't': //NOT gate
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(int j=0;j<no_wire;j++){//Either one of the following or none wil happen at each 'j'
                                      if((node[j].input_gate == &logic[i]) & (node[j].value!=2))
                                           //check for value in the output.
                                           //remove the frontier tag from this gate.
                                          {cout<<"index of the output of the orphan gate  "<<j<<endl; 
                                           value_backtracked=node[j].value;//saves the value of backtracked value
                                           }}
                   for(int j=0;j<no_wire;j++){
                                        if((node[j].output_gate == &logic[i]) & (node[j].value==2))//checks for the unassgned inputs
                                          {if (value_backtracked ==1)
                                              node[j].value= 0;//Assgn the value.
                                              else
                                              node[j].value= 1;
                                           cout<<" the index of the wire which is input to orphan gate "<<j<<endl;
                                           cout<<" value assgined to this wire is "<<node[j].value <<endl;
                                           array_input[a]=j;
                                           cout<<"array of inputs new addition "<< array_input[a]<<" at index   "<<a<<endl;
                                           a++;
                                          } // Else if will be entered twice so 'a' will at max become 1!!!
                  
                  }
                  break;
                   case 'x': //XOR gate
                    int exclusive=1;
                    //we randomnly assign all n-1 inputs to zero
                    //thus output will depend on this exclusive input only
                   
                    /********************Exclusive******************/
                   // We would want to make other input =1; so that output shall be the excitation.
                   for(int j=0;j<no_wire;j++){//Either one of the following or none wil happen at each 'j'
                                      if((node[j].input_gate == &logic[i]) & (node[j].value!=2))
                                           //check for value in the output.
                                           //remove the frontier tag from this gate.
                                          {cout<<"index of the output of the orphan gate  "<<j<<endl; 
                                           value_backtracked=node[j].value;//saves the value of backtracked value
                                           }}
                   for(int j=0;j<no_wire;j++){
                                        if((node[j].output_gate == &logic[i]) & (node[j].value==2))//checks for the unassgned inputs
                                          {if ((value_backtracked ==1)&(exclusive==1))
                                              {node[j].value= 1;//Assgn the value.
                                              exclusive=0;}
                                              else
                                              node[j].value= 0;
                                           cout<<" the index of the wire which is input to orphan gate "<<j<<endl;
                                           cout<<" value assgined to this wire is "<<node[j].value <<endl;
                                           array_input[a]=j;
                                           cout<<"array of inputs new addition "<< array_input[a]<<" at index   "<<a<<endl;
                                           a++;
                                          } // Else if will be entered twice so 'a' will at max become 1!!!
                  
                                           }
                                           break;
                   
                       }    
/***********
This gate is no more orphan, so switching the orphan value of this gate to 0**********************/

          logic[i].orphan=0;

//It is clear that the new  inputs will create new inputs provided that they are not primary inputs. Therefore creating new orphans.
              for(int j=0;j<a;j++)
               {if(node[array_input[j]].input_gate != NULL)//make sure that this is not a primary input.
               node[array_input[j]].input_gate -> orphan=1;
               cout<<"orphan of input gate set to 1"<<endl;}

//ASSIGN the inputs of this orphan gate some value
//we will have very crude assignment here. eg. in case of AND gate if the output is one, inputs are 1,1. If output is zero inputs are 0,0.
               }
    return condition;
    }
    
 int  create_orphan(int no_wire,int no_gate,wire *node, gate *logic)
 {int condition=0;//return 2 if there is no more 
 cout<<" inside create orphan "<<endl;
     // This function checks for possibility of presence of any orphan which might have been missed out.
     // Check for all orphans
     int i=0;
     for(i=0; i<no_wire; i++){
    if (node[i].input_gate != NULL){
      if (node[i].input_gate -> orphan ==0) {
         for (int j=0; j<no_wire;j ++) {
             if ((node[j].output_gate == node[i].input_gate ) & node[j].value==2){
             node[i].input_gate ->orphan =1 ;
             cout<<" New orphan to input of wire at index === "<<i<<endl;}
         }
     } }
 }
 if ( i == no_wire )
 condition = 2;
 
            return condition;
 }               
     
     
     
     
  
int main()
{ cout<<" *********************Welcome to test geneartor ************************** "<<endl;
    int no_gate=2;
    int no_wire=5;
cout<<" Enter No of gates in the circuit "<<endl;
cin>>no_gate;
cout<<"Enter No of Wires in the circuit "<<endl;
cin>>no_wire;
 
 cout<<" The circuit contains -- "<< no_gate <<" Number of gates  and -- " <<no_wire<<" Number of node.  "<<endl;
   /* Typical circuit
    w0------
             G0----w3-----
    w1-------              G2------w5----
              G1---w4------
    w2------
    
    */
    wire node[no_wire];
    gate logic[no_gate];
    
    cout<<endl;
    cout<<"Note the index for all nodes and gates start from 0. "<<endl;
    //read gates
    //int i;
    for (int i=0; i<no_gate; i++)
    {cout<<endl<<"Read gate no "<<i<<endl;
        logic[i]=readgate();
   // cout<<"check some value of just read gate"<<endl;
   // cout<<"no_input ==  "<<logic[i].no_input <<endl;
   // cout<<"function ==  "<<logic[i].f <<endl;
    }
    //read wire
    for (int i=0; i<no_wire;i++)
    {cout<<endl<<"Read node no "<<i<<endl;
        node[i]=readwire(logic);
   // cout<<"checking on faults"<<node[i].fault<<endl;
    //cout<<node[i].output_gate->f<<endl;
    }
    cout<<"checking faults of all the wire  "<<endl;
      for (int i=0; i<no_wire;i++)
    {cout<<node[i].fault<<endl;}
      
      //excitation condition
      int check=0;
 for (int i=0; i<no_wire;i++)
    { check=i;
          if (node[i].fault < 2) //fault exists
    break;}
    //assign frontier
    cout<<"check == "<<check<<endl;
    cout<<" frontier assigned  with value before"<<logic[check].frontier<<endl;
    if(node[check].output_gate != NULL){
    node[check].output_gate->frontier=1;
    cout<<"type fo gate "<<node[check].output_gate->f;
    cout<<node[check].value<<endl;
    cout<<" frontier assigned  with value   "<< node[check].output_gate->frontier<<endl;
}    
    //assign orphan
    //The gate of which the fault is output will be the first to get the orphan 
    if(node[check].input_gate != NULL)
   { node[check].input_gate->orphan = 1; // Assign a gate to be orphan only if it exits
                                        //In this case the fault is on primary input. No input gate exist. Therefore orphan assignment not possible
    cout<<"Initial orphan assigned to the input gate of fault"<<endl<<endl;}
    //at this point node[check] has a fault
 cout<<"excitaion observed at node   "<<check<<endl;
    if(node[check].fault==0)//stuck-at-0 faul
    node[check].value=1;//it is D condition
    else if(node[check].fault==1)
    node[check].value=0;// it is D- condition
cout<<"assigned excitaion == "<<node[check].value<<endl;
//implication
/*int implication_count=0;
switch(node[check].input_gate->f){
 case 'a'://and gate
 // We are considering only and' gate here
                                  if(node[check].value==0)
                                 for(int j=0; j<node[check].input_gate->no_input; j++){
                                         for (int i=0; i<no_wire; i++){
                                             if(node[i].output_gate == node[check].input_gate)
                                                {node[i].value=0;
                                                 break;}
                                                 }
                                                 }
                                 else if (node[check].value==1)
                                  for(int j=0; j<node[check].input_gate->no_input; j++){
                                         for (int i=0; i<no_wire; i++){
                                             if(node[i].output_gate == node[check].input_gate)
                                                {node[i].value=1;
                                                 break;}
                                                 }
                                                 }
                                 break;}*/
                                  
 //number of primary inputs
 int no_primaryip=0;
 //number of final output
 int no_finalop=0;
 for(int i=0; i<no_wire;i++){
        //int count=0;
         if(node[i].input_gate==NULL)
         no_primaryip ++;
         }
 for(int i=0; i<no_wire;i++){
        //int count=0;
         if(node[i].output_gate==NULL)
         no_finalop ++;
         }
         
         cout<<"no of input   =="<<no_primaryip<<endl;
         cout<<"no of output    =="<<no_finalop<<endl<<endl; 
         
//Excitation condition.
// Find which gate has excitation at output
int check_if_frontier_has_reached_op=0;
int no_more_orphan=0;
while(!((check_if_frontier_has_reached_op==1)&(no_more_orphan==2)))
{
if(check_if_frontier_has_reached_op==0)
check_if_frontier_has_reached_op= complete_frontier(no_wire, no_gate,node,logic);
else
cout<<"frontier reached output  "<<endl;

no_more_orphan=complete_orphan(no_wire, no_gate, node, logic);
if(no_more_orphan==1)
no_more_orphan=create_orphan(no_wire, no_gate, node, logic);//will return '1' if new orphans are created, '2' if no new orphans exists
if(no_more_orphan==2)
cout<<"all the wires are assigned "<<endl<<endl;
}
/*******
printing all assignments 
*****************************************/

for(int i=0; i<no_wire ;i++)
{cout<<" index  ----  "<<i<<" node value ----  "<<node[i].value<<endl;
} 
//cout<<"output value"<<node[2].value;}
//for(int i=0; i<no_wire; i++){};
//finding inputs to orphan gate                                                          
//if (node[3].output_gate == logic[2])

    cout<<"done junta"<<endl;

while(1){;}

return 0;
}

